The present invention relates to a stepper motor logic circuit for providing stepper motor control signals to the drivers of a stepper motor. In particular, the stepper motor logic circuit interfaces with a central processing unit (CPU) to receive data indicative of the stepping rate (number of steps per unit of time) and to provide variable rate control signals to a four-phase stepper motor. The control signal outputs sequentially switch the four drivers of the stepper motor phases in accordance with the rate information that is written to the logic circuit by the CPU.
Stepper motor logic circuits that interface a CPU with stepper motor drivers are known in the art. Such logic circuits, known as variable step controllers, have been designed for stepping the motor a fixed number of steps. The CPU writes the number of steps, varying from 0 to 7, to the logic circuit which then steps the motor in accordance with the written number of steps at a constant rate. Such systems may include the ability to change the stepping rate in a limited manner in accordance with programmable rate data provided to the system; however, it is believed that such rate data remains constant during the stepper motor movement. Thus, such systems do not control the stepper motor by writing variable rate data to the logic circuit, but rather, by writing step data to the system which then drives the stepper motor at a constant rate until the steps have been completed.
A disadvantage of such system is that the stepper motor runs at a constant stepping rate, typically at the maximum stepping rate. At a maximum stepping rate, the torque output of the stepper motor remains at a minimum, an obvious disadvantage in certain applications.
Stepper motor control circuits that interface with a CPU are also shown in U.S. Pat. Nos. 4,234,830; 4,258,301; and 4,362,979. Although such patents describe systems that may change the stepper rate under certain conditions, they operate in a manner different from that of the instant invention.